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Gate drive supp. Data Sheet No. Gate drive supply range from 12 to 18V? Undervoltage lockout? Current detection and limiting loop to limit driven? Error lead indicates fault conditions and programs? Output in phase with input? Latch immune CMOS technology enables ruggedized monolithic construction. The output driver features a high pulse current buffer stage designed for minimum cross-conduction. The protection circuitry detects over-current in the driven power transistor and limits the gate drive voltage.
Cycle-by-cycle shut8-Lead PDIP down is programmed by an external capacitor which directly controls the time interval between detection of the over-current limiting condition and latched shutdown. Please refer to our Application Notes and DesignTips for proper circuit board layout. COM www. All voltage parameters are absolute voltages referenced to COM. The Thermal Resistance and Power Dissipation ratings are measured under board mounted and still air conditions.
For proper operation the device should be used within the recommended conditions. The VS offset rating is tested with all supplies biased at 15V differential. The dynamic electrical characteristics are defined in Figures 2 through 5. Units Test Conditions 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 2. Switching Time Waveform Definitions Figure 4.
Turn-On Time vs. Temperature Figure 7B. Turn-Off Time vs. Temperature Figure 8B. Voltage 5. ERR to Output Shutdown vs. Temperature Figure 9B. Voltage 6 www. Turn-On Rise Time vs. Temperature Figure 10B. Turn-Off Fall Time vs. Temperature Figure 11B. Voltage 2. CS to Output Shutdown vs. Temperature Figure 12B. Voltage www. Temperature Figure 13B.
Temperature Figure 14B. Temperature Figure 15B. Voltage 8 www. Temperature Figure 16B. CS Input Threshold - vs. Temperature Figure 17B. Voltage 1. High Level Output vs. Temperature Figure 18B. Low Level Output vs. Temperature Figure 19B. VCC Supply Current vs. Temperature Figure 20B. Voltage 25 25 Logic "1" Input Bias Current? A 15 Logic "1" Input Bias Current?
A 20 20 15 10 Max. Temperature Figure 21B. Voltage 10 www.
IR2121 DRIVER. Datasheet pdf. Equivalent
Dt Sheet. IRF IR Latch immune CMOS technology enables ruggedized monolithic construction. The output driver features a high pulse current buffer stage designed for minimum cross-conduction. The protection circuitry detects over-current in the driven power transistor and limits the gate drive voltage.
IR2121 Datasheet PDF